BitFury Announces Launch of 16 nm ASIC Capable of 0.06 J/GH

Bitcoin mining hardware maker BitFury has announced the design completion and tapeout of its 16 nm ASIC.

Bitcoin mining hardware maker BitFury has announced the design completion and tapeout of its 16 nm ASIC (application specific integrated circuit).

The company expects the milestone to bring “unmatched energy efficiency” to bitcoin mining. It expects the chip to operate at a peak efficiency of 0.06 J/GH (1 J = 0.000000278 kwh, 1 GH = 10^9 hashes).

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In a press release, the company says that the feat will herald the new “Exahash era”, whereby the total bitcoin network mining hash rate reaches 1 Exahash (EH) per second. A hash rate of 1 EH would represent roughly a 150% increase to the current rate of approximately 400 PH/s (1 PH = petahash = 10^6 GH, 1 EH = 1,000 PH).

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The hash rate has stagnated between 300 and 400 PH/s for much of 2015, only recently creeping higher to a new peak of 450 PH/s. This, despite exponential increases during years prior. Previous predictions anticipated a 1 EH/s rate by July 1 this year, and 2 EH/s by the beginning of 2016. This assumed a bitcoin price of $400, nearly double that of today. More recent predictions foresee the rate reaching between 700 PH/s and 1 EH/s by year’s end, assuming a bitcoin price of $250.

Greater energy efficiency brings down the operating expenses of mining bitcoins, which mostly consist of electricity costs. BitFury also noted the positive environmental impact of lower energy consumption.

Declining bitcoin prices have made it harder for miners to remain profitable. Only those with the most efficient hardware have been able to stay in the game. Advances in hardware efficiency have counteracted the price declines, helping to maintain the equilibrium of slight profitability and move the hash rate gradually higher. When bitcoin prices were soaring, however, mining was highly profitable, allowing miners to pile in at a faster rate and drive the hash rate exponentially higher.

It attributed the level of energy efficiency to its design methodology, “which should result in the highest transistor density of any leading-edge processor.”

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